Extending Copper’s value proposition for AI interconnects

Kandou AI’s approach is rooted in information theory and communications engineering. Conventional high-speed electrical links treat cross talk between adjacent conductors as interference that must be minimized or compensated for.

Copper MIMO technology (aka Chord Signaling^TM) takes a different approach. By encoding signals across multiple wires, the architecture is designed to make use of information contained in the interference between channels rather than treating it solely as noise. The objective is to extract significantly more usable capacity from copper links while improving bandwidth, power and reach characteristics.

Linga argues that substantial channel capacity remains untapped in copper interconnects before fundamental physical limits are reached, creating an opportunity to design groundbreaking AI systems with copper interconnects at the core. high-bandwidth AI systems.

Copper and Optics Are Not Mutually Exclusive

The discussionalso challenges the increasingly common framing of AI connectivity as atransition from copper to optics.

According to Linga, future systems are more likely to use both technologies according to their respective physical advantages. Copper remains attractive for short- and medium-reach scale-up connectivity because of cost, reliability, power and integration considerations, while optics becomes increasingly advantageous as distance increases.

“The reality is that for the data centers of the future, you need the best optics technology to work hand in glove with the best copper technology,” says Linga.

The engineering question therefore becomes less about selecting a single interconnect technology and more about determining where electrical and optical links should sit within the system hierarchy.

Expanding the System Beyond the Package

One of the broader architectural implications discussed in the podcast is the possibility of extending highly efficient chip-to-chip connectivity beyond the package and across the PCB.

Kandou AI has demonstrated a chip-to-chip link intended to operate across the board while maintaining characteristics associated with much shorter die-to-dieconnections. Linga argues that this can expand the design space beyond a conventional multi-chip module, allowing the PCB itself to become part of a larger distributed compute and memory architecture.

Such an approach could become increasingly relevant as AI systems require more distributed memory capacity and larger collections of compute, memory and networking devices to operate as a coordinated system.

Rather than treating the memory wall as a single bottleneck, the discussion points toward a more heterogeneous architecture in which memory type, compute architecture and interconnect technology are optimized together.

The full TechThreads conversation with Srujan Linga explores the memory maze, Kandou AI Copper MIMO (Chord Signaling^TM), copper and optical interconnects, distributed memory, and the implications for future AI system architectures, and is available via this link.

References:

Understanding the AI Memory Wall : AI and Memory Wall Amir Gholami, Zhewei Yao, Sehoon Kim, Coleman Hooper, Michael W. Mahoney and Kurt Keutzer, 2024.

An accessible starting point for understanding why memory bandwidth is increasingly becoming a dominant performance bottleneck for AI workloads and why advances in compute alone will not resolve it.